Hello @duffer5 I got some insight on whether an internal clock of RS130 is making sense or not from generative AI , I am not professional of this part, so just for you guy to judge!
In terms of correcting jitter, both the clock signal from the source and the DAC can play a role.
Jitter refers to the variation in the timing of a clock signal or data transmission. It can introduce noise and distortions in the reproduced signal. To mitigate jitter, various techniques can be employed.
The clock recovery circuit in the DAC is typically responsible for reducing jitter. It uses specialized algorithms and filters to recreate a clean and stable clock signal from the received data. This ensures that the DAC accurately samples the data at the correct timing.
On the other hand, if the clock signal from the source has excessive jitter, it can negatively impact the quality of the DAC’s output. In such cases, additional clock jitter reduction techniques may be employed before the clock signal is fed into the DAC. These techniques might include using clock regeneration or clock cleaning circuits to remove or minimize jitter before it reaches the DAC.
In summary, the DAC’s clock recovery circuit is primarily responsible for mitigating jitter, but measures can also be taken to minimize jitter in the clock signal from the source before it reaches the DAC.